VHDL or Verilog?The most I've made is a tri rasterizer on an Altera Cyclone IV in VHDL.When I was deciding which language, VHDL seemed less insane but not by a wide margin.

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▶Anonymous 06/21/18 (Thu) 05:54:10 No.933094>>933101 [Watch Thread][Show All Posts]

VHDL or Verilog?

The most I've made is a tri rasterizer on an Altera Cyclone IV in VHDL.When I was deciding which language, VHDL seemed less insane but not by a wide margin.

▶Anonymous 06/21/18 (Thu) 06:15:55 No.933101

>>933094 (OP)

Both will get the job done. Choose the one you like best, or whatever your employer demands. I personally prefer VHDL because more potential errors can be caught during the analysis phase.

If you prefer Ada to C, then choosing VHDL is a no brainer.

/tech/ - Technology★

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