>>856290
Usual FPGA circuit will use multiple clocks depending on the requirements of the circuit. You can have some part running at 1 Hz and push data to some bus running at 100 MHz. They don't usually go above 1 GHz.
>>856292
>I'm curious how the Ethernet and USB ports work on that board. Are there routines you load into the FPGA to get a TCP/IP stack?
Usually manufacturer provides IP (Intellectual property) cores https://www.xilinx.com/products/intellectual-property/ef-di-25gemac.html to handle networking, otherwise you build it using state machines. Most FPGAs use special transciever interfaces to push large amounts of data (>1Tb/s).
>Do you push the work to a FPU, or again load a routine to do it all in the FPGA
There is no FPU on FPGA, you can implement one but you usually just send it to DSP or literary build an adder from logic gates.